Behemoths in the semiconductor industry have agreed on the standardization of an open-source chiplet design that would help them all by lifting any inter-compatibility issues, hopefully laying the ground for a new era in processor design manufacturing.
The firms that have agreed on the UCIe 1.0 specification (Universal Chiplet Interconnect Express) are Intel, AMD, Arm, Google, Meta, Microsoft, Samsung, Qualcomm, and TSMC (Taiwan Semiconductor Manufacturing Company).
The importance of this historic moment lies in the versatility of chiplets and the various applications they can support, as their configuration potential is practically endless. This means that clients may source their computational platform components from different vendors/manufacturers, and create their very own solution without having to worry about functional or connectivity issues.
Besides the physical connectivity issues that underpin chiplet design, UCIe 1.0 also sets a functional context that chipmakers must follow. The key performance indicators selected for the new standard will meet the projected needs of a wide range of industries for the next 5 to 6 years.
Of course, there are some configurable factors in the spec such as the data rate, the cluster width (lane counts), the length of physical channel connection, etc. In general, the die alignments need to be tight, and the latency must be below two nanoseconds.
The consortium is open to new memberships, but it’s unlikely we’ll see Nvidia, RISC-V, or Apple joining it. In particular, Apple has interests that oppose the creation and proliferation of a strong open-source hardware standard that will streamline hardware validation and qualification.
However, the success of UCIe 1.0 isn’t guaranteed just because it’s sponsored by the aforementioned tech giants. Actual adoption and widespread support will play a crucial role in how UCIe does and whether we’ll get to see the consortium return for version 2.0 in the future.
Image by Colin Behrens from Pixabay
Article Source: Business Wire
